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Intel正在招聘

CAD Physical Design Engineer

工作地点：Austin, TX

申请要求：

• Master's degree in Computer Engineering and/or Electrical Engineering in Computer Engineering and/or Electrical Engineering OR Bachelor's degree in Computer Engineering and/or Electrical Engineering and 2+ years of relevant working experience.

• Coursework and/or 3+ months experience in VLSI, design automation algorithms, and transistor-level design.

• Coursework and/or 3+ months experience using industry standard Engineering Design Automation (EDA) VLSI tools/flows from vendors such as Synopsys, Cadence and/or Mentor Graphics for performing synthesis, place-and-route, extraction, timing/power analysis and functional verification.

• 1+ years' experience with Python, Perl, and/or Tcl scripting languages.

• 1 or more years of relevant working experience in microprocessor or other high speed design backend design.

• Experience with timing closure methodology for worst-case corner (static timing analysis / STA, statistical variation analysis, spice circuit simulation, ERC, noise analysis flows, cross talk, OCV effects, budget constraints).

• Proficient in VLSI transistor-level design concepts, such as dynamic circuit techniques and memories, circuit modeling, including SPICE modeling and worst-case corner.

• Physical design knowledge of device physics and in particular aspects which impact Tapeout experience on deep sub-micron FinFET technology nodes (7nm and below), resolving timing challenges, multi-corner and multimode timing closure.

• Proficiency in EDA tools such as Fusion Compiler, PrimeTime, PrimePower, NanoTime, PrimeSim, Spectre, and/or Solido on high-performance SoC or microprocessor designs.

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